1. Field of the Invention
The invention pertains to a liquid crystal device, and more particularly, to a liquid crystal device for displaying and scanning images, and a method of driving the same.
2. Description of the Related Art
Among the various types of flat panel display (FPD) devices, liquid crystal display (LCD) devices are widely used as monitors for notebook computers and desktop computers because of their excellent characteristics such as light weight, portability and low power consumption. Specifically, active matrix type LCD devices having thin film transistors (TFTs) as switching elements have been researched and developed because of their superiority in displaying moving images.
FIG. 1 is a schematic block diagram of a liquid crystal display device according to the related art, and FIG. 2 is a schematic view showing a liquid crystal panel of the liquid crystal display device according to the related art. In FIGS. 1 and 2, the liquid crystal display device includes a liquid crystal panel 2 and a liquid crystal module (LCM) driving circuit 26. The LCM driving circuit 26 includes an interface 10, a timing controller 12, a source voltage generator 14, a reference voltage generator 16, a data driver 18 and a gate driver 20. RGB data and timing sync signals, such as clock signals, horizontal sync signals, vertical sync signals and data enable signals, are input from a driving system (not shown) such as a personal computer, to the interface 10. The interface 10 outputs the RGB data and the timing sync signals to the timing controller 12. For example, a low voltage differential signal (LVDS) interface and transistor logic (TTL) interface may be used for transmission of the RGB data and the timing sync signals. In addition, the interface 10 may be integrated in a single chip together with the timing controller 12.
A plurality of gate lines “GL1” to “GLn” and a plurality of data lines “DL1” to “DLm” are formed in the liquid crystal panel 2 and are driven respectively by the gate driver 20 and the data driver 18. The plurality of gate lines “GL1” to “GLn” and the plurality of data lines “DL1” to “DLm” cross each other to define a plurality of pixel regions “P.” For each pixel region P, a thin film transistor “TFT” is connected to the corresponding gate line and the corresponding data line, and a liquid crystal capacitor “LC” connected to the thin film transistor “TFT” is formed in each pixel region “P.” The liquid crystal capacitor “LC” is turned on/off by the thin film transistor “TFT,” thereby modulating transmittance of incident light and displaying images.
The timing controller 12 generates data control signals for the data driver 18 including a plurality of data integrated circuits (ICs), and gate control signals for the gate driver 20 including a plurality of gate ICs. Moreover, the timing controller 12 outputs data signals to the data driver 18. The reference voltage generator 16 generates reference voltages of a digital-to-analog converter (DAC) used in the data driver 18. The reference voltages are set up according to transmittance-voltage characteristics of the liquid crystal panel 2. The data driver 18 determines the reference voltages for the data signals according to the data control signals and outputs the determined reference voltages to the liquid crystal panel 2 to adjust a rotation angle of liquid crystal molecules.
The gate driver 20 controls ON/OFF operation of the thin film transistors (TFTs) in the liquid crystal panel 2 according to the gate control signals from the timing controller 12. Accordingly, the data signals from the data driver 18 are supplied to pixels in the pixel regions of the liquid crystal panel 2 through the TFTs. The source voltage generator 14 supplies source voltages to elements of the LCD device and a common voltage to the liquid crystal panel 2.
LCD devices have been developed to have multiple functions in addition to display of images. Specifically, an LCD device including an image sensor array has been suggested. The LCD device including an image sensor array can function as a scanner, thereby sensing images as well as displaying images. When the LCD device including an image sensor array is operated as a scanner in a scan mode, a photo voltage generated based on intensity of received light is stored in a storage capacitor for photo voltage. The photo voltage in the storage capacitor is outputted to an external circuit in response to a scan signal. In the external circuit, the photo voltage is compared with a sensing reference voltage so that a scanned image is read. While the scan signal is applied, the photo voltage is transmitted from the storage capacitor to the external circuit, and thereafter a reset voltage having the same voltage as the sensing reference voltage is transmitted from the external circuit to the storage capacitor. Accordingly, the storage capacitor is charged up to a voltage level of the sensing reference voltage at that time.
FIG. 3 is a schematic timing chart showing such scan signals for operation after conversion to a scan mode of a liquid crystal display device according to the related art. FIG. 3 exemplarily shows two scan signals “VGN” and “VGN+1” sequentially applied to an nth gate line “Gn” and an (n+1)th gate line “Gn+1.” As shown in FIG. 3, a time period for a single frame of each scan signal “VGN” and “VGN+1” is divided into three sub time periods “tp1,” “tp2” and “tp3.” Each scan signal “VGN” and “VGN+1” has a high level voltage of +25V during the first and second sub time periods “tp1” and “tp2,” and has a low level voltage of −5V during the third sub time period “tp3.” A photo voltage stored in a storage capacitor is transmitted to an external circuit (not shown) during the first sub time period “tp1,” and then a reset voltage is transmitted from the external circuit to the storage capacitor during the second sub time period “tp2.” In addition, a photo voltage is stored in the storage capacitor during the third sub time period “tp3.”
However, when the LCD device is operated using the scan signals “VGN” and “VGN+1” of FIG. 3, a scanned image can be distorted. According to the operation using the scan signals “VGN” and “VGN+1” of FIG. 3, the photo voltage stored in the storage capacitor is transmitted to the external circuit immediately after a display mode of the LCD device is converted into a scan mode in the first frame. While the LCD device is operated in the display mode, a parasitic voltage can be generated due to a parasitic capacitor formed by elements such as TFTs and signal lines of the LCD device, and be stored in the storage capacitor. Accordingly, the parasitic voltage can be added to the photo voltage in the storage capacitor at the start of the first frame to distort the scanned image in the scan mode. Even though the storage capacitor is reset with the reset voltage during the second sub time period “tp2” of the first frame, the storage capacitor is not completely charged up to the reset voltage because of shortage of the second sub time period “tp2.”